1. Field of the Invention
The present invention relates to a method and a circuit for producing a control signal for impedance matching, and more particularly to the method and the circuit for producing the stable control signal for impedance matching by using a count value output from an up-down counter as a control signal for impedance matching to be used for matching of terminating impedance of an impedance matching circuit that requires impedance matching and by comparing a voltage to be compared to be produced based on the count value and changing the count value through control of the up-down counter according to a result from the comparison.
The present application claims priority of Japanese Patent Application No. 2002-132552 filed on May 8, 2002, which is hereby incorporated by reference.
2. Description of the Related Art
Conventionally, an electronic signal transmitting path is provided with a unit which can perform impedance matching at a sending end and at a receiving end of a signal. An aim of performing such impedance matching is to normally transmit an electric signal from the sending end of the signal to the receiving end of the signal. Particularly, some high-speed input/output interfaces constructed using semiconductor devices, since they generate high heat therein, are cooled to minus several tens of degrees. When these high-speed input/output interfaces are used during long periods in communication applications, their temperatures are increased up to plus several tens of degrees. If such the big change in the temperature or power source voltages occurs during use of the high-speed input/output interface, a change also occurs in impedance in the semiconductor device which is performing impedance matching. Due to this, a state occurs in which the impedance in the high-speed input/output interface is not matched and, therefore, a method to avoid such the state and to always maintain a matched impedance is needed. As one of the methods for achieving such the impedance matching, an output impedance calibrating circuit is disclosed in Japanese Patent Application Laid-open No. 2000-59202 (hereinafter referred to a xe2x80x9cfirst applicationxe2x80x9d). FIG. 30 shows a schematic block diagram of the disclosed output impedance calibrating circuit.
An outline of the disclosed output impedance calibrating circuit is described below. An impedance varying circuit 111 shown in FIG. 30 provides an impedance according to a binary code output from an up-down counter 114. A connecting point 111a is a connecting point placed between the impedance varying circuit 111 and a resistor 112. A voltage Va to be compared occurring at the connecting point 111a is fed to one input terminal of a comparator 113. The voltage Va to be compared is a voltage which represents, in a simulated manner, an impedance provided by the impedance calibrating circuit in the high-speed input/output interface. To another input terminal of the comparator 113 is fed a reference voltage Vref which does not change even if a change in temperature occurs. A comparison between the voltage Va to be compared and the reference voltage Vref is made by the comparator 113 and a counting operation corresponding to a result of the comparison is performed in the up-down counter 114.
Though an impedance in the impedance varying circuit 111 is calibrated according to a binary code output from the up-down counter 114 and feed-back control is exerted so that the voltage Va to be compared converges to the reference voltage Vref, the voltage Va to be compared, as shown in FIG. 31A, changes at levels being higher or lower than a level of the reference voltage Vref. That is, the binary code itself output from the up-down counter 114 is changed. Therefore, since the binary code output from the up-down counter 114, as is, cannot be used as data for impedance matching, conventionally, in order to stabilize the variable binary code so as to be stable and to be a constant value, an averaging circuit (explained later) is introduced. FIG. 31B shows a state of a change in a voltage Va to be compared in the case of using such the averaging circuit.
As one of examples of the averaging circuit, technology containing the averaging circuit is disclosed in Japanese Patent Application Laid-open No. Hei 10-190642 (hereinafter called a xe2x80x9csecond applicationxe2x80x9d). The technology disclosed in the second application is a bit synchronizing technology which is essential when a digital signal in digital transmission is reproduced on a receiving side, in which the averaging circuit is used. The bit synchronizing circuit (not shown) employed in the second application includes a phase comparing unit (not shown), a retiming unit (not shown), an averaging unit (not shown), and a selecting unit (not shown) as elements featuring the bit synchronizing technology.
An outline of operations of the bit synchronizing circuit (not shown) is described. In its phase comparing unit, frequency-divided data obtained by dividing a frequency of receiving data is compared with each clock signal of polyphase clock signals and a specified signal to specify one clock signal contained in the polyphase clock signals having a phase relation being predetermined in the frequency-divided data is produced. The retiming unit (not shown) performs retiming operations on the frequency-divided data according to an extracted clock signal selected by the selecting unit (not shown). The specified signal fed from the phase comparing unit (not shown) to the averaging circuit (not shown) is averaged in synchronization with a signal output from the retiming unit (not shown) and then is output. The selecting unit (not shown) receiving the signal from the averaging unit (not shown) alternatively extracts one clock signal contained in the above polyphase clock signals according to the signal output from the averaging (not shown) unit and outputs the extracted clock signal. The extracted clock signal outputted from the selecting unit (not shown) is used in the retiming unit (not shown) and for performing retiming operations on received data.
The averaging circuit (not shown) disclosed in the above second application is, more particularly, made up of a subtractor, one m-th weighting section, an adder, a storing section, numeral operating section, and a flip-flop (none being shown). The averaging circuit (not shown), after having subtracted, using the subtractor (not shown), a value of the specified signal fed from the phase comparing (not shown) unit from a value fed from the storing section (not shown), performs dividing operations on the subtracted value using the one m-th weighting section (not shown) and stores an average value obtained by adding, using the adder (not shown), a value resulting from the dividing operations to a value fed from the storing section (not shown) and by making a correction to a result from the addition, in the storing section (not shown). Then, a numerical operating section (not shown) rounds off the average value fed from the storing section (not shown) to the nearest integer and the flip-flop (not shown) performs retiming operations on the average value of a phase comparing signal according to a signal fed from the retiming unit and outputs the resulting value.
However, the above conventional technology has problem. That is, as described above, by connecting the above averaging circuit (not shown) to an output terminal of the output impedance calibrating circuit (not shown), a variable binary code can be stabilized. The stabilization of the binary code, in the output impedance calibrating circuit (not shown), can be achieved so long as a voltage Va to be compared is changed at a level being sufficiently apart from an offset voltage of the comparator 113 from a level of the reference voltage Vref. This is because, as shown in FIG. 31A, the voltage Va to be compared is changed under such conditions described above at two voltage level being higher and lower than a level of the reference voltage Vref. Moreover, an offset voltage of the comparator 113 represents a voltage being near to a reference voltage Vref which causes a mistake in judging whether a voltage Va to be compared is larger or smaller than a reference value.
However, in the comparator 113 described above, when a voltage Va to be compared gets near to the reference voltage Vref by a value exceeding a value resulting from addition of an offset voltage of the comparator 113 to the voltage Va to be compared or by a value exceeding a value resulting from subtraction of the offset voltage of the comparator 113 to the voltage Va to be compared, it is not certain that count values output from the up-down counter 114 are increased by a voltage corresponding to xe2x80x9cone stepxe2x80x9d or decreased by a voltage corresponding to xe2x80x9cone stepxe2x80x9d. In such the comparator 113 as operated as above, when a noise happens to be added to the voltage Va to be compared, even if the voltage Va to be compared becomes higher by a voltage crossing over the offset voltage of the comparator 113 than the reference voltage Vref or becomes lower by a voltage exceeding the offset voltage than the reference voltage Vref, same phenomenon as appeared in the above case occurs.
Therefore, if such the state as described occurs, counting operation of the up-down counter 114 becomes irregular. In response to the binary code output from the up-down counter 114 being put in the above state, an impedance in the impedance varying circuit 111 is changed and a voltage Va to be compared occurring at a connecting point 111a becomes a voltage shown in FIG. 32A. In such a state as above, even if the averaging circuit (not shown) disclosed in the above application is connected for use to the output terminal of the up-down counter 114, an output from the averaging circuit (not shown) is varied as shown in FIG. 33. That is, an irregular variation occurs in a lowest order bit. Introduction of the averaging circuit (not shown) becomes meaningless. FIG. 34 is a diagram obtained by graphing data shown in FIG. 33. FIG. 32B is a diagram showing only outputs shown in FIG. 34 from the averaging circuit (not shown). Moreover, FIG. 33 shows values obtained by assuming that m=4 in the one m-th weighting section (not shown) incorporated in the averaging circuit (not shown) disclosed in the second application.
Thus, even if the averaging circuit (not shown) is connected to the output terminal of the output impedance calibrating circuit (not shown) to achieve stabilization of the binary-coded value, when the irregular operation described above occurs, variation of the lowest order bit, that is, an error being equivalent to one step occurs in impedance matching. If a number of bits incorporated in the binary code is increased in order to reduce such the error, a problem arises that the circuit is complicated and its circuit size is increased.
Moreover, as described above, the binary code (being made up of N-pieces of bits) output from the up-down counter 114 is used as data for impedance matching to be fed to an output impedance matching circuit (not shown) that requires impedance matching or input impedance matching circuit (see FIG. 35) that also requires impedance matching. An i-th control bit (one of bits made up of i=1, 2, . . . , N) for a P-channel and an i-th control bit for an N-channel, both of which are produced based on the binary bit, are fed separately through a NAND circuit 1211 and a NAND circuit 1231 (to each of another input terminal of these circuit is fed a corresponding data bit) and via separate wires respectively to each of impedance matching control input terminals, that is, to a gate of a P-channel type MOSFET (Metal Oxide Semiconductor Field Effect Transistor) 1241 and a gate of an N-channel type MOSFET 1251 corresponding to an output impedance matching circuit (not shown) or an input impedance matching circuit (not shown) either being made up of a P-channel type MOSFET and an N-channel type MOSFET. Since variations exist in a floating capacity occurring in each of the wires and since the more the number of wires become, the more output timing for every signal being output from each wiring is varied, another problem occurs in that jitters occurs in signals output from an output impedance matching circuit or input impedance matching circuit.
In view of the above, it is an object of the present invention to provide a method for producing a stable control signal for impedance matching and a circuit for producing the stable control signal for impedance matching by using, at least, an offset value of a comparator when a voltage to be compared is regularly changed according to count values output from an up-down counter and by averaging the count values within a predetermined period of time.
According to a first aspect of the present invention, there is provided a method for producing a control signal for impedance matching for adjusting an output impedance of an output buffer or an input impedance of an input buffer by comparing a voltage to be compared with a reference voltage to increase, when the voltage to be compared is smaller than the reference voltage, the voltage to be compared by a predetermined voltage and to decrease, when the voltage to be compared is larger than the reference voltage, the voltage to be compared by a predetermined voltage and by producing the control signal based on a result from the comparison and using this produced control signal, the method including:
a step of setting so that the predetermined voltage to be used when a change in the voltage to be compared is switched from its increasing state to its decreasing state or when the change in the voltage to be compared is switched from its decreasing state to its increasing state has a potential being smaller than that of the predetermined voltage to be used when the voltage to be compared is caused to continue increasing and when the voltage to be compared is caused to continue decreasing and so that a voltage obtained by adding both predetermined voltages to be used when a change in the voltage to be compared is switched from its increasing state to its decreasing state or when a change in the voltage to be compared is switched from its decreasing state to its increasing state has a potential being smaller than that when the voltage to be compared is caused to continue increasing or when the voltage to be compared is caused to continue decreasing.
In the foregoing first aspect, a preferable mode is one wherein the predetermined voltage to be used when the voltage to be compared is caused to continue increasing and when the voltage to be compared is caused to continue decreasing is made constant.
Another preferable mode is one wherein the voltage to be compared is changed in every specified period of time and values given by the control signals produced based on a result from the comparison made in the every specified period of time are averaged in a predetermined time.
Still another mode is one wherein, in the change in the voltage to be compared, a value to be used when the voltage to be compared is caused to increase and a value to be used when the voltage to be compared is caused to decrease are made different from each other.
According to a second aspect of the present invention, there is provided a circuit for producing a control signal for impedance matching including:
a comparator to compare a voltage to be compared with a reference voltage in every determined time;
an up-down counter to increment, every time results from the comparison by the comparator are input and compared, a count value by 1 (one) when the voltage to be compared is smaller than the reference voltage and to decrement a count value by 1 (one) when the voltage to be compared is larger than that the reference voltage;
a first circuit for changing a value of a voltage to be compared based on the count value;
a second circuit for producing and outputting a control signal for impedance matching; and
wherein the first circuit does setting so that, when a value of a voltage to be compared is changed, a value to be used when the value of the voltage to be compared is increased and a value to be used when a value of a voltage to be compared is decreased are made different from each other and changes a value of the voltage to be compared so that a potential to be changed when a change in the voltage to be compared is switched from its increasing state to its decreasing state or when a change in the voltage to be compared is switched from its decreasing state to its increasing state is smaller than a potential to be changed in every counting when the voltage to be compared is caused to continue increasing and decreasing and so that a potential obtained by adding a potential to be used when a change in the voltage to be compared is switched from its increasing state to its decreasing state and a potential to be used when a change in the voltage to be compared is switched from its decreasing state to its increasing state is smaller than a potential to be changed in every counting when the voltage to be compared is caused to continue decreasing and increasing and wherein the second circuit produces and outputs a control signal for the impedance matching based on an average value of the count values measured within the predetermined time.
In the foregoing second aspect, a preferable mode is one wherein the first circuit includes two impedance elements being connected serially between a power source and a ground and wherein the voltage to be compared is output from a connecting point of both of the impedance elements and wherein the impedance elements being connected to the power source are transistors being, in parallel, connected whose impedance values are changed according to the count value and a signal based on the count value is input to a gate of each of the transistors.
Another preferable mode is one wherein the impedance elements being connected to the power source are made up of a switching element and a resistor, instead of the transistors and wherein the switching element is closed or opened depending on a signal based on the count value.
According to a third aspect of the present invention, there is provided a method for producing a control signal for impedance matching including:
a step of comparing a voltage to be compared with a reference voltage by a comparator;
a step of incrementing count values output from an up-down counter by only 1 (one) in every predetermined period of time when a result of the comparison indicates that the voltage to be compared is smaller than the reference voltage and of decrementing the count values output from the up-down counter by only 1 (one) in every predetermined period of time when the result of the comparison indicates that the voltage to be compared is larger than the reference voltage;
a step of changing the voltage to be compared by a predetermined voltage based on the count values for every one counting operation of the up-down counter;
a step of producing, based on the count values, the control signal for the impedance matching to be used for matching terminating impedance of a circuit that requires impedance matching;
a step of regularly changing the voltage to be compared at levels being higher and lower than a level of the reference voltage;
a step of setting, even when the voltage to be compared gets closest to the reference voltage, the predetermined voltage to be used for changing the voltage to be compared at a voltage at which the voltage to be compared is apart by an offset voltage of the comparator from the reference voltage; and
a step of outputting the control signal for the impedance matching based on an average value of count values obtained by one counting operation of the up-down counter within a predetermined period of time.
According to a fourth aspect of the present invention, there is provided a method for producing a control signal for impedance matching including:
a step of comparing a voltage to be compared with a reference voltage by using a comparator;
a step of decrementing count values output from an up-down counter by only 1 (one) in every predetermined period of time when a result of the comparison indicates that the voltage to be compared is smaller than the reference voltage and of incrementing the count values output from the up-down counter by only 1 (one) in every predetermined period of time when the result of the comparison indicates that the voltage to be compared is larger than the reference voltage;
a step of changing the voltage to be compared by a predetermined voltage based on the count values for every one counting operation of the up-down counter;
a step of producing, based on the count values, the control signal for the impedance matching to be used for matching terminating impedance of a circuit that requires impedance matching;
a step of regularly changing the voltage to be compared at levels being higher and lower than a level of the reference voltage;
a step of setting, even when the voltage to be compared gets closest to the reference voltage, the predetermined voltage to be used for changing the voltage to be compared at a voltage at which the voltage to be compared is apart by an offset voltage of the comparator from the reference voltage; and
a step of outputting the control signal for impedance matching based on an average value of count values obtained by one counting operation of the up-down counter within a predetermined period of time.
In the foregoing third and fourth aspect, a preferable mode is one wherein setting of the predetermined voltage for changing is made so that the voltages to be compared become symmetric with respect to the reference voltage at levels being higher and lower than a level the reference voltage.
Also, a preferable mode is one wherein setting of the predetermined voltage for changing is made so that the voltages to be compared become asymmetric with respect to the reference voltage at levels being higher and lower than the level of the reference.
Also, a preferable mode is one wherein the predetermined voltage is changed so that a ratio of the changing is made larger when a difference between the reference voltage and the voltage to be compared is the larger.
Also, a preferable mode is one wherein the predetermined voltage is changed, irrespective of magnitude of the difference between the reference voltage and the voltage to be compared, so that a ratio of the changing is made almost same.
Also, a preferable mode is one wherein the predetermined period of time is time required for counting the count values obtained by four times counting and the average value is an average value of the count values obtained by the four times counting.
Also, a preferable mode is one wherein the predetermined period of time is time required for counting the count values obtained by six times counting and the average value is an average value of the count values obtained by the six times counting.
Also, a preferable mode is one wherein the predetermined period of time is time required for counting the count values obtained by eight times counting and the average value is an average value of the count values obtained by the eight times counting.
Also, a preferable mode is one wherein the changing of the predetermined voltage is made based on a code that has been converted so that only one bit incorporated in the code is changed for one time change in counting the count values.
Also, a preferable mode is one wherein the changing of the predetermined voltage is made based on the count values.
Also, a preferable mode is one wherein the control signal for impedance matching is output using a code that have been converted so that only one bit incorporated in the code is changed for one time change in the count values obtained by averaging.
According to a fifth aspect of the present invention, there is provided a circuit for producing a control signal for impedance matching of terminating impedance of a circuit that requires impedance matching including:
a comparator to compare a voltage to be compared with a reference voltage in every predetermined time;
an up-down counter to receive a result from the comparison by the comparator to increment a count value output from an up-down counter by only 1 (one) every time when a result of the comparison indicates that the voltage to be compared is smaller than the reference voltage and to decrement the count value output from the up-down counter by only 1 (one) every time when the result of the comparison indicates that the voltage to be compared is larger than the reference voltage;
a circuit for changing the voltage to be compared used to change the voltage to be compared by a predetermined voltage based on the count values for every one counting operation of the up-down counter wherein the count value is used for outputting the control signal for the impedance matching, and
wherein the circuit for changing the voltage to be compared regularly changes the voltage to be compared at levels being higher and lower than a level of the reference voltage and sets, even when the voltage to be compared gets closest to the reference voltage, the predetermined voltage to be used for changing the voltage to be compared at a voltage at which the voltage to be compared is apart by an offset voltage of the comparator from the reference voltage and has an averaging circuit to produce an average value of count values obtained by one counting operation within a predetermined period of time and outputs the control signal for impedance matching by using the averaged count values.
According to a sixth aspect of the present invention, there is provided a circuit for producing a control signal for impedance matching of terminating impedance of a circuit that requires impedance matching including:
a comparator to compare a voltage to be compared with a reference voltage in every predetermined time;
an up-down counter receiving a result from the comparison made by the comparator to decrement count values output from an up-down counter by only 1 (one) every time when the result of the comparison indicates that the voltage to be compared is smaller than the reference voltage and to increment the count values output from the up-down counter by only 1 (one) every time when the result of the comparison indicates that the voltage to be compared is larger than the reference voltage;
a circuit for changing the voltage to be compared used to change the voltage to be compared by a predetermined voltage based on the count values for every one counting operation of the up-down counter wherein the count values are used for outputting the control signal for the impedance matching; and
wherein the circuit for changing the voltage to be compared regularly changes the voltage to be compared at levels being higher and lower than a level of the reference voltage and sets, even when the voltage to be compared gets closest to the reference voltage, the predetermined voltage to be used for changing the voltage to be compared at a voltage at which the voltage to be compared is apart by an offset voltage of the comparator from the reference voltage and has an averaging circuit to produce an average value of count values obtained by one counting operation within a predetermined period of time wherein the average value is used for outputting the control signal for the impedance matching.
In the foregoing fifth and sixth aspect, a preferable mode is one wherein setting of the predetermined voltage for changing to be made by the circuit for changing a voltage to be compared is made so that the voltages to be compared become symmetric with respect to the reference voltage at levels being higher and lower than a level of the reference voltage.
Also, a preferable mode is one wherein setting of the predetermined voltage for changing to be made by the circuit for changing a voltage to be compared is made so that the voltages to be compared become asymmetric with respect to the reference voltage at levels being higher and lower than the level of the reference voltage.
Also, a preferable mode is one wherein a value for one counting of the predetermined voltage to be changed by the circuit for changing a voltage to be compared is the larger when a difference between the reference voltage and the voltage to be compared is larger.
Also, a preferable mode is one wherein a value for one counting of the predetermined voltage to be changed by the circuit for changing a voltage to be compared is almost same, irrespective of magnitude of the difference between the reference voltage and the voltage to be compared.
Also, a preferable mode is one wherein the predetermined period of time is time required for counting the count values obtained by four times counting and the average value is an average value of the count values obtained by four times counting.
Also, a preferable mode is one wherein the predetermined period of time is time required for counting the count values obtained by six times counting and the average value is an average value of the count values obtained by six times counting.
Also, a preferable mode is one wherein the predetermined period of time is time required for counting the count values obtained by eight times counting and the average value is an average value of the count values obtained by eight times counting.
Also, a preferable mode is one wherein the changing of the predetermined voltage to be made by the circuit for changing a voltage to be compared is made based on a code that has been converted so that only one bit incorporated in the code is changed for one time change in counting the count values.
Also, a preferable mode is one wherein the changing of the predetermined voltage to be made by the circuit for changing a voltage to be compared is made based on the count values.
Also, a preferable mode is one wherein the circuit for changing a voltage to be compared is made up of an impedance circuit which includes a plurality of impedance elements being connected in parallel each being designated based on a bit incorporated in the count values wherein a first impedance element out of the impedance elements produces a first impedance, a second impedance element produces a second impedance being larger than the first impedance, and remaining impedance elements produce an impedance being larger than that of the second impedance element and of a first control circuit to control connection or disconnection of the first impedance element based on an up-signal output from the comparator and on a lowest order bit out of bits incorporated in the count values, of a second control circuit to control connection or disconnection of the second element based on a down-signal output from the comparator and on a lowest order bit out of bits incorporated in the count values, and of a third control circuit to ordinarily connect one impedance element out of the remaining impedance elements and to control connection or disconnection of every one of other impedance elements for every counting operation based on bits being higher than the lowest order bit.
Also, a preferable mode is one wherein when an impedance of remaining impedance elements of the circuit for changing a voltage to be compared is set to be 1 (one), an impedance of the first impedance element is set to be xc2xd (one half) and, when an impedance of the second impedance element is set to be xc2xe (three-fourths), the predetermined voltage to be applied while the up-signal is being output from the comparator is set to be a voltage being lower by twenty-five percent than the predetermined voltage output by parallel connection of any one of the remaining impedance elements and the predetermined voltage to be applied while the down-signal is being output from the comparator is set to be a voltage being higher by twenty-five percent than the predetermined voltage output by parallel connection of any one of the remaining impedance elements.
Also, a preferable mode is one wherein the circuit for changing a voltage to be compared is configured by replacing the first impedance element with the second impedance element.
Also, a preferable mode is one wherein, when an impedance of remaining impedance elements of the circuit for changing a voltage to be compared is set to be 1 (one), an impedance of the first impedance element is set to be xc2xe (three fourths) and, when an impedance of the second impedance element is set to be one half, the predetermined voltage to be applied while the up-signal is being output from the comparator is set to be a voltage being lower by xc2xd (fifty percent) than the predetermined voltage output by parallel connection of any one of the remaining impedance elements and the predetermined voltage to be applied while the down-signal is being output from the comparator is set to be a voltage being higher by xc2xc (twenty-five percent) and more and by less than xc2xd (fifty percent) than the predetermined voltage output by parallel connection of any one of the remaining impedance elements.
Also, a preferable mode is one wherein the circuit for changing a voltage to be compared is made up of a resistor circuit being connected between an operating power source terminal and a first resistor element whose one terminal is connected to a reference voltage terminal and using another terminal of the first resistor element as an output terminal of the voltage to be compared, which has a second resistor element being connected between the operating power source terminal and the another terminal of the first resistor element and a plurality of third resistor elements being connected in parallel through switching elements between the operating power source terminal and another terminal of the first resistor element which provides a resistance being different from a resistance of the second resistor element, and of a first control circuit to control electric connection or disconnection of a switching element being connected serially to one of a plurality of the third resistor elements based on an up-signal output from the comparator and on a lowest order bit out of bits incorporated in the count values, of a second control circuit to control electric connection or disconnection of a switching element being connected serially to one of the plurality of the third resistor elements based on a down-signal output from the comparator and on a lowest order bit out of bits incorporated in the count value, and of a third control circuit to control electric connection or disconnection of every switching element for every counting operation which is connected to resistor elements except the two resistor elements out of the plurality of the second resistor elements based on a bit being higher than the lowest order bit.
Also, a preferable mode is one wherein the circuit for changing a voltage to be compared is configured by replacing the one resistor element with the another resistor element.
Also, a preferable mode is one wherein the circuit for changing a voltage to be compared has an impedance varying circuit placed on a package and a fourth resistor element, placed outside the package, being connected through a parasitic resistor mounted on the package to the impedance varying circuit and wherein an impedance of the impedance varying circuit and an impedance of the resistor element are set at a value being large enough to prevent an influence of an impedance of the parasitic resistor on a ratio of the impedance of the impedance varying circuit to the impedance of the fourth resistor element.
Also, a preferable mode is one wherein the circuit for changing a voltage to be compared has an impedance varying circuit, placed on a package, whose one terminal is connected to the operating power source terminal and whose another terminal is connected to one terminal of a parasitic resistor mounted on the package and to one input terminal of the comparator, a fourth resistor element, placed outside the package, whose one terminal is connected to another terminal of the parasitic resistor and whose another terminal is connected to a reference voltage terminal, and fifth and sixth resistor elements being connected serially between the operating power source terminal and the reference voltage terminal wherein their connecting point is connected to another input terminal of the comparator, and wherein a ratio of the impedance of the impedance varying circuit to a sum of the parasitic resistance and an impedance of the first resistor element is made equal to a ratio of an impedance of the fifth resistor element to an impedance of the sixth resistor element.
Furthermore, a preferable mode is one that wherein includes a code converting circuit to convert to a code wherein only one bit is changed for one time change of the count values having been averaged and wherein a control signal for the impedance matching is output using the code having been converted by the code converting circuit.
With the above configurations, by changing a voltage to be changed at levels being higher and lower than a level of a reference voltage and, even if the voltage to be compared gets closest to the reference voltage, by setting a voltage causing the voltage to be compared to change for every one count value output from an up-down counter at a voltage at which the voltage to be compared is apart from the reference voltage by an offset voltage of a comparator and by outputting a control data for impedance matching based on an average voltage of count values obtained by one counting operation of the up-down counter within a predetermined period of time, though the voltage to be compared changes, jitter of control signals for impedance matching can be suppressed.
With another configuration, by stabilizing the control signal for impedance matching so as to be constant, it is made possible to prevent occurrence of variation in matching impedance, thus enabling a purpose of the impedance matching to be successfully achieved.
With still another configuration, by suppressing the variation in matching impedance and by reducing errors in impedance matching, it is made possible to reduce a number of bits required for impedance matching. This serves to suppress occurrence of jitter caused by an increase in bit signals for impedance matching data, particularly in a high-speed interface of a GHz class used in a broadband network devices or a like. If such devices deal with the same number of bits, the amount of jitter caused in signals output from an output impedance matching circuit or input impedance matching circuit can be reduced the more. Therefore, in a technological environment requiring reduced jitter of the output signal, the present invention is very effective. Moreover, since the number of bits for the impedance matching data can be reduced, it is possible to reduce a number of circuits the more and a required area on a chip, thus serving to simplify circuits of the impedance matching data outputting circuit of the present invention.
With still another configuration, by making uniformed a change in an amount of a change in an impedance of a transistor which is changed by a control signal (change code), an amount of a change in the voltage to be compared which changes, with a shift voltage being included, in response to a change of one step of the change code can be made same. As a result, characteristics of a shift voltage required in a comparator become same, thus achieving stabilization of operations of a feedback control system.
With still another configuration, by structuring a part to fix an impedance to be of a transfer gate type and by connecting a linear resistor to the transfer gate, a range of a linear characteristic of a voltage to be compared can be made expanded.
With still another configuration, by expanding a range to a desired range, sensitivity adjustment of impedance in ordinary calibration operations can be achieved.
With still another configuration, by using a resistor instead of an impedance varying circuit, a variation of an impedance caused by a change in an operating voltage can be prevented, thus improving performance of impedance matching.
With still another configuration, by making ratios of two voltage-divided impedance (resistance value) of a circuit for changing a voltage to be changed be same and making a voltage-divided impedance of the circuit for producing the voltage to be change be extraordinarily larger than an impedance (resistance) of a circuit requiring impedance matching, an influence on a parasitic resistance can be almost removed. Moreover, by making a ratio of a voltage-divided impedance containing a parasitic resistance of the circuit for changing the voltage to be compared be equal to a ratio of a voltage-divided resistance which produces a reference voltage to be fed to a comparator, influences of parasitic resistors and/or a change in an operating voltage can be prevented.